Patent · US Expired

Method and system for performing permutations using permutation instructions based on butterfly networks

US6922472B2 · kind B2 · utility

9Cited by
18References
65Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 7, 2001
Grant dateJul 26, 2005
Priority date
Expiry dateAug 5, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L9/34
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

The present invention provides permutation instructions which can be used in software executed in a programmable processor for solving permutation problems in cryptography, multimedia and other applications. The permute instructions are based on a Benes network comprising two butterfly networks of the same size connected back-to-back. Intermediate sequences of bits are defined that an initial sequence of bits from a source register are transformed into. Each intermediate sequence of bits is used as input to a subsequent permutation instruction. Permutation instructions are determined for permitting the initial source sequence of bits into one or more intermediate sequence of bits until a desired sequence is obtained. The intermediate sequences of bits are determined by configuration bits. The permutation instructions form a permutation instruction sequence of at least one instruction. At most 21 gr/m permutation instructions are used in the permutation instruction sequence, where r is the number of k-bit subwords to be permuted, and m is the number of network stages executed in one instruction. The permutation instructions can be used to permute k-bit subwords packed into an n-bit …

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.