Patent · US Expired

Method and apparatus for vector processing

US6922716B2 · kind B2 · utility

33Cited by

7References

12Claims

0Family size

Assignee

Motorola, Inc. · US

Inventors

Vipul Desai · Palatine, US
David P. Gurney · Carpentersville, US
Benson Chau · Rantoul, US

Key dates

Filing date	Jul 13, 2001
Grant date	Jul 26, 2005
Priority date	—
Expiry date	Jul 15, 2023

Classification

Technology area (CPC G)Physics
CPC primaryG06F2207/3828
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A processor includes a first vector processing unit including a first register file and first vector arithmetic logic unit; a second vector processing unit including a second register file and second vector arithmetic logic unit wherein the first register file has a first plurality of cross connections to the second vector arithmetic logic unit; wherein the second register file as a second plurality of cross connections to the first vector arithmetic logic unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.