Manufacturing method for SOI semiconductor device, and SOI semiconductor device
US6924183B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 31, 2003 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | Dec 31, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A manufacturing method for an SOI semiconductor device includes creating transistors and an element isolation region on a semiconductor layer in an SOI substrate. The method also includes covering the transistors and the element isolation region with a first insulation film. The method also includes creating a first opening section which penetrates the first insulation film, element isolation region and a buried oxide film to expose the support substrate. The method also includes creating a first source interconnect, first drain interconnect and first gate interconnect which are electrically connected to the transistors, on the second insulation film. The method also includes forming dummy interconnects which are connected with these interconnects, and are electrically connected with the support substrate via the first opening section, on the second insulation film. The method also includes disconnecting the dummy interconnects to electrically insulate the first source interconnect, first drain interconnect and first gate interconnect from the support substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.