Over-evaluating samples during rasterization for improved datapath utilization
US6924820B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2001 |
| Grant date | Aug 2, 2005 |
| Priority date | — |
| Expiry date | Feb 10, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T11/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for rasterizing and rendering graphics data is disclosed. Vertices may be grouped to form primitives such as triangles, which are rasterized using two-dimensional arrays of samples bins. To overcome fragmentation problems, the system's sample evaluation hardware may be configured to over-evaluate samples each clock cycle. Since a number of the samples will typically not survive evaluation because they will be outside the primitive being rendered, the remaining surviving samples may be combined into sets, with one set being forwarded to subsequent pipeline stages each clock cycle in order to attempt to keep the pipeline utilization high.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.