Patent · US Expired

Method and apparatus for power routing in an integrated circuit

US6925627B1 · kind B1 · utility

126Cited by
6References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 20, 2002
Grant dateAug 2, 2005
Priority date
Expiry dateSep 22, 2023

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F30/394
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A system and method for routing power between circuit blocks in an integrated circuit, such as macros and standard cells. A macro is wrapped in a relatively narrow power interface ring and placed in the integrated circuit such that the lower metal layers of the power interface ring are aligned and in direct contact with the power rails of a standard cell block. A power grid is formed above the macro and the upper metal layers of the power interface ring are coupled to the power grid. The upper power grid is tied either to an outer power bus or directly to power pins in the surrounding I/O ring. Data signals may be routed in the I/O ring space.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.