Buried solder bumps for AC-coupled microelectronic interconnects
US6927490B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 7, 2004 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Oct 7, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10727
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Microelectronic packages include a first microelectronic substrate having a first face and a first AC-coupled interconnect element on the first face. A second microelectronic substrate includes a second face and a second AC-coupled interconnect element on the second face. A buried solder bump extends between the first and second faces, and is at least partially buried beneath the first and/or second faces, to maintain the first and second AC-coupled interconnect elements in closely spaced apart relation. The buried solder bump also may couple DC power between the first and second substrates. Other technologies also may be used to maintain the AC-coupled interconnect elements in closely spaced apart relation and to couple DC power between the substrates. The first and second AC-coupled interconnect elements may be first and second capacitor plates, first and second inductors and/or first and second combined inductive and capacitive elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.