Response-based analog-to-digital conversion apparatus and method
US6927713B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2004 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Apr 16, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for increasing the resolution of analog-to-digital conversion devices and systems is described. The described apparatus and method operate without significantly increasing the complexity or conversion time of conventional analog-to-digital conversion architectures. The improved resolution is accomplished by detecting the time-dependent response characteristics of comparators used within an analog-to-digital converter. The detected response characteristics, such as the response pattern or the response time, are used to estimate the overdrive voltage on the comparator of interest and to thereby provide additional bits to the analog-to-digital conversion process. In those applications where the response characteristics affect the settling characteristics of the converter output bits, additional resolution may be attained by detecting the settling characteristics, such as the settling pattern or settling time, of the converter output bits, particularly the least significant bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.