Estimating bulk delay in a telephone system
US6928160B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2002 |
| Grant date | Aug 9, 2005 |
| Priority date | — |
| Expiry date | Jun 16, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M9/08
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A bulk delay estimating circuit matches time intervals representing a signal with time intervals representing an echo of the signal to identify the echo and estimate bulk delay. Bulk delay is estimated by computing (1, 2, . . . n) intervals representing the signal, computing (1, 2, . . . n) intervals representing an echo of the signal, computing absolute differences between corresponding intervals to produce n absolute differences, summing the n absolute differences, and providing an output indicating whether or not the sum is less than a predetermined amount. The intervals are determined by defining a plurality of numbered frames, comparing the energy of a signal during each frame with at least one threshold, storing the numbers of the frames in which the threshold is exceeded, and defining an interval as the period from one frame in which the threshold is exceeded to the next frame in which the threshold is exceeded. Bulk delay is estimated from the frame numbers of the signal, its echo, and the duration of a frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.