Patent · US Expired

Method and apparatus for testing digital circuitry

US6928597B2 · kind B2 · utility

1Cited by
3References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 3, 2001
Grant dateAug 9, 2005
Priority date—
Expiry dateNov 1, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L1/243
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Digital circuitry is tested through effecting a paired data loop-back from a first buffered output to a first buffered input whilst within the circuitry executing at least part of the test through using a Built-In-Self-Test methodology. In particular, the loop-back is effected from the first buffered data output to a buffered control input, from a buffered control output to the first buffered data input, or both. Advantageously, the buffering is associated to executing a conversion between a digital full swing internal signal and an analog low swing external signal with respect to core circuitry of the digital circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.