Method of manufacturing semiconductor device using STI technique
US6933194B2 · kind B2 · utility
13Cited by
5References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2003 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Nov 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device including forming a laminate structure which includes a gate insulation film on a semiconductor substrate and a gate electrode material film on the gate insulation film, processing the gate electrode material film to obtain a gate electrode having a reverse tapered cross section, and forming a device isolation insulation film in direct contact with a side surface of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.