Bus network interface
US6933745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2003 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Nov 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/387
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for transmitting data includes one or more transmitters connected to each of at least one bus data line via open-driver bus data line drivers, and one or more receivers. In a preferred embodiment, the devices are interconnected by a parallel interface using a bus architecture having the bus data and carrier-sense (CRS) lines each driven by open-collector or open-drain drivers in a wired-and configuration. Pullup resistors and a common clock signal are also provided. Each device is provided with an interfacing unit which connects the device to the bus, and detects collisions by comparing data transmitted by the device with data received from the bus. The invention is particularly applicable to implementation as a backplane connecting intercommunicating printed wiring boards having interfaces such as the IEEE 802.3 (Ethernet) Media Independent Interface (MII), the interfacing unit serving to emulate the Ethernet PHY.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.