Method and apparatus for efficient mixed signal processing in a digital amplifier
US6933778B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2004 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Aug 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3031
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method of creating a highly efficient digital amplifier which can take either analog or digital inputs, and produce a high power accurate representation of the input to drive speakers or other low impedance load is described. The system employs a transition detector and delay unit which allows the comparator of the signal modulator to ignore its inputs for a pre-determined number of subsequent clock cycles once an output transition has been detected. Through the use of faster clocks and variable clock cycle skips upon the comparator's output transition, finer resolution of the feedback's clock period for noise-shaping purposes is achieved. Finer resolution of the clock period allows the present invention to employ a more aggressive noise-shaping than previously possible.In another aspect of the invention; additional delta-sigma modulator noise suppression is obtained by using the common bridge implementation of the power output stage with the improvement of configuring the bridge to create a 3-state condition instead of the conventional 2 states. By controlling the two halves of the bridge independently of one another, an output with 3 states makes for improved noise s…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.