Clock generation and distribution in an emulation system
US6934674B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1999 |
| Grant date | Aug 23, 2005 |
| Priority date | — |
| Expiry date | Sep 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/135
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for clock generation and distribution in an emulation system is described. The present invention provides a method and apparatus for generating a derived clock signal with a circuit having a look up table. A counter circuit counts clock cycles and provides an index into the look up table. A frequency divider circuit may be used between the counter circuit and a base clock signal to provide an intermediate clock signal with a frequency that is less than the frequency of the base clock signal. In one embodiment, a selection circuit is provided to select between the base clock signal and an external clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.