Patent · US Expired

System for manintaining inter-packet gaps in cascade transmission system for packet-based data

US6937624B1 · kind B1 · utility

7Cited by
6References
3Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 7, 2000
Grant dateAug 30, 2005
Priority date
Expiry dateNov 4, 2022

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J3/0632
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A unit for receiving and re-transmitting data signals comprising multi-byte packets separated by multi-byte inter-packet gaps includes a FIFO store, a first, write, state machine for controlling the writing of packets into the FIFO and a second, read, state machine for controlling read-out of packets from the FIFO. The first state machine is controlled by a recovered clock and the second state machine is controlled by a local system clock. The first state machine is operative in a writing sequence to write into the FIFO the words of each received packet in successive locations and thereafter to cause the writing into the FIFO of a succession of idle bytes representing a selected inter-packet gap; and the second state machine is operative in response to maintain a reading sequence in arrears of the writing sequence by a selected number of said locations. The arrangement maintains the inter-packet gap despite slight differences between the recovered clock and the system clock.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.