Rate and acceleration limiting filter and method for processing digital signals
US6937678B2 · kind B2 · utility
6Cited by
11References
28Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 12, 2001 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Dec 25, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0261
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital filter and filtering method uses a rate of change limit and an acceleration limit to significantly attenuate high bandwidth noise signals with minimal phase lag, while simultaneously passing low bandwidth signals substantially uncorrupted. The filter uses two memory states making it computationally efficient.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.