System and method of processing a data signal

US6937949B1 · kind B1 · utility

Assignee

• FINISAR CORPORATION · US

Inventors

• Alex Fishman · San Francisco, US
• Konstantinos G. Haritos · Saratoga, US
• Paul Sung · Saratoga, US
• Dmitri Bannikov · Mountain View, US
• Serguei Dorofeev · Sunnyvale, US

Key dates

• Filing date: Oct 31, 2002
• Grant date: Aug 30, 2005
• Expiry date: Jun 27, 2023

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/3171
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Systems and methods for testing bit processing capacities of electronic devices and for reducing or eliminating jitter that compromises the ability of electronic devices to perform this task. Embodiments include circuitry and a methodology for locating and employing a data signal delay—in conjunction with a latch—to reduce or eliminate jitter from serial encoded data generated by a serializer/deserializer. The data signal delay ensures that the latch latches a state of the serial encoded data at a position within a data signal cycle of minimum jitter.