Interlaced protocol for smart card application development
US6938244B1 · kind B1 · utility
6Cited by
20References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2000 |
| Grant date | Aug 30, 2005 |
| Priority date | — |
| Expiry date | Apr 19, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q20/105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) card is presented comprising an input/output (I/O) interface and a smart card development interface (SCDI), coupled to the I/O interface, to receive and identify debug frames interlaced within a normal communication flow between the IC card and a host system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.