Method of forming an etch stop layer in a semiconductor device
US6939812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2001 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Mar 12, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is a method of manufacturing a semiconductor device. In an example embodiment, the method comprises applying a semiconductor substrate that is provided with a conductor at a surface. The conductor has a top surface portion and sidewall portions, of which at least the top surface portion is provided with an etch stop layer comprising silicon carbide. A dielectric layer is applied. A via is etched in the dielectric layer over the conductor and, and stopping on the etch stop layer to create an exposed part of the etch stop layer. Inside the via from at least the top surface portion of the conductor, the exposed part of the etch stop layer is removed. The via is filled with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.