Termination structure for a semiconductor device
US6940145B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2002 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Oct 15, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device (e.g. MOSFET or IGBT) comprises active and termination regions (1,2) formed in a semiconductor substrate (4). The substrate (4) has an upper surface and a termination including a trench (12) extending into the substrate (4) from the upper surface within the termination region (1). Termination trench (12) is at least partly filled with an insulating material (13) which extends from the termination trench (12) to overlie adjacent regions of the device above the surface. A channel stop region (11) extends laterally from a side wall of the termination trench (12) into the substrate (4).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.