Semiconductor package and method of preparing same
US6940177B2 · kind B2 · utility
19Cited by
6References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 16, 2002 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | May 16, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package comprising a semiconductor wafer having an active surface comprising at least one integrated circuit, wherein each integrated circuit has a plurality of bond pads; and at least one cured silicone member covering at least a portion of the active surface, wherein at least a portion of each bond pad is not covered by the silicone member, the silicone member has a coefficient of linear thermal expansion of from 60 to 280 μm/m° C. between −40 and 150° C. and a modulus of from 1 to 300 MPa at 25° C., and the silicone member is prepared by the method of the invention.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.