Hysteresis circuit used in comparator
US6940329B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2004 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Apr 12, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/2481
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A hysteresis circuit for use in a comparator having a first and a second transistors as an input stage and a constant current source. The hysteresis circuit comprises a first resistor disposed between a source of the first transistor and the constant current source and a second resistor disposed between a source of the second transistor and the constant current source, and comprises a first and a second current generating means. The first current generating means supplies a current to the source of the first transistor and derives a current out from the source of the second transistor if an output signal of the comparator is a first logic value, while the second current generating means supplies a current to the source of the second transistor and derives a current out from the source of the first transistor if the output signal of the comparator is a second logic value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.