Continuously adjusted-bandwidth discrete-time phase-locked loop
US6940875B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2003 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Aug 19, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0081
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A reciever for receiving a CDMA communication signal that is wirelessly transmitted includes a system for correcting phase errors in an information signal which has been transmitted. The correction system comprises circuitry for generating a mixing signal and for combining the mixing signal with said information signal to produce a correction signal. An analyzer analyzes the phase of said correction signal and generates an error signal based on the deviation of the analyzed phase from a reference phase. A bandwidth controller which recursively adjusts the phase of the correction signal such that the phase of said correction signal is substantially equal to said reference phase. The bandwidth controller then selects a bandwidth within an adjustable range based on the correction signal, estimates an offset by interrogating the error signal, and modifies said correction signal by the offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.