Clock supply circuit for supplying a processing clock signal used for processing an input signal having a predetermined frequency
US6941485B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2001 |
| Grant date | Sep 6, 2005 |
| Priority date | — |
| Expiry date | Dec 16, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A clock supply circuit capable of supplying clock signals having different frequencies to processing circuits, simplifying the circuit configuration, and realizing a reduction of the power consumption only by using a low frequency external oscillator, wherein a reference clock is multiplied by a multiplication circuit to generate a multiplied clock, the multiplied clock is divided by a predetermined division ratio to generate a clock signal having a desired constant frequency by a receiving clock generating circuit, furthermore, a DSP clock generating circuit generates a clock signal having a variable frequency according to a processing load of a DSP in accordance with a judgment result of a load judgment circuit, so it is possible to supply a clock signal maintained synchronization with received signal as well as a clock signal having a frequency variably controlled in accordance with the processing load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.