Fracturable lookup table and logic element
US6943580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2003 |
| Grant date | Sep 13, 2005 |
| Priority date | — |
| Expiry date | Feb 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A logic element includes memory elements, multiplexers, and controls. The multiplexers are arranged in levels including a highest level of multiplexers with inputs connected to the memory elements and outputs connected to inputs of a next-to-highest level of multiplexers and a first level of multiplexers with inputs connected to outputs of a second level of multiplexers and at least one output. The controls are connected to the multiplexers. In a first operational mode the controls determine a first-mode output at the at least one output of the first level of multiplexers, and in a second operational mode the controls determine a plurality of second-mode outputs at selected outputs of multiplexers not at the first level of multiplexers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.