Patent · US Expired

Method and arrangement for arithmetic encoding and decoding binary states and a corresponding computer program and a corresponding computer-readable storage medium

US6943710B2 · kind B2 · utility

49Cited by
9References
63Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 4, 2003
Grant dateSep 13, 2005
Priority date
Expiry dateDec 4, 2023

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04N19/13
  • WIPO fieldAudio-visual technology
  • WIPO sectorElectrical engineering

Abstract

A method and arrangement for arithmetic encoding/decoding is described, wherein the probability estimation is performed by a finite state machine FSM, wherein the generation of N representative states of the FSM is performed offline. Corresponding transition rules are filed in the form of tables. In addition, a pre-quantization of the interval width R to a number of K pre-defined quantization values is carried out. With suitable dimensioning of K and N, this allows the generation of a table containing all K×N combinations of pre-calculated product values R×PLPS for a multiplication-free determination of RLPS. Overall, the result is a good compromise between high coding efficiency and low calculation effort.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.