Semiconductor storage and its refreshing method
US6944081B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 30, 2001 |
| Grant date | Sep 13, 2005 |
| Priority date | — |
| Expiry date | Dec 29, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device capable of a further reduction in power consumption for refresh operation is provided. Cell arrays S0, S1 are divided into respective four blocks B0˜B3 and B10˜B13. In a normal read/write operation, by address data designating a word line, one of the cell arrays is selected, and also one block is selected in the selected cell array, and further one word line is selected in the selected block. In a refresh operation, one of the cell arrays is selected, and four blocks in the selected cell array are simultaneously refreshed. Namely, respective one word line is selected from each of the four blocks, and the selected word lines are refreshed, thereby to reduce a power comsumption as compared to when the plural cell arrays are refreshed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.