Memory system for multiple data types
US6944720B2 · kind B2 · utility
28Cited by
25References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2003 |
| Grant date | Sep 13, 2005 |
| Priority date | — |
| Expiry date | Mar 27, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system is provided for storing multiple data types. The memory system includes a main memory, a local cache, and a translation unit. The local cache has multiple entries, each of which includes a data field to store data and a status field to indicate a storage state for the stored data. The translation unit includes a translation lookaside buffer (TLB) and a status-cache (STC). The TLB stores address translations for data in the main memory, and the STC stores storage states for data indicated by the address translations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.