Fractional-N baseband frequency synthesizer in bluetooth applications

US6946884B2 · kind B2 · utility

Assignee

• Agere Systems Inc. · US

Inventors

• William Eric Holland · Lynchburg, US
• Wenzhe Luo · Shanghai, CN
• Zhigang Ma · Shanghai, CN
• Dale H. Nelson · Shillington, US
• Harold Simmonds · Stewartsville, US
• Lizhong Sun · San Jose, US
• Xiangqun Sun · Dover, US

Key dates

• Filing date: Apr 25, 2002
• Grant date: Sep 20, 2005
• Expiry date: Apr 25, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/1976
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A baseband clock synthesizer having particular use in a BLUETOOTH piconet device, having the capability of generating either 12 MHz or 13 MHz clock signals generated from any reference clock signal, e.g., 12.00, 12.80, 13.00, 15.36, 16.80, 19.20, 19.44, 19.68, 19.80, and 26.00 MHz. A fractional-N frequency divider is implemented with a PLL including a variable divider allowing the use of virtually any reference frequency input to generate a locked 156 MHz clock signal used as a basis for a 12 MHz or 13 MHz baseband clock signal. A residue feedback sigma-delta modulator provides a varying integer sequence to an integer divider in a feedback path of the PLL, effectively allowing division by non-integer numbers in the PLL. Thus, the PLL can be referenced to virtually any reference clock and still provide a fixed output clock signal (e.g., 12 or 13 MHz).