Network adapter with embedded deep packet processing
US6947430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2001 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Sep 21, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A network interface device includes host interface logic, arranged to receive from a host processor a frame of outgoing data that includes outgoing header information and outgoing payload data, and to separate the header information from the payload data. A transmit protocol processor is coupled to read and process the outgoing header information from the outgoing header memory so as to generate at least one outgoing packet header in accordance with a predetermined network protocol. Transmit logic is coupled to receive and associate the at least one outgoing packet header with the outgoing payload data from the outgoing data memory, so as to generate at least one outgoing data packet for transmission over a network in accordance with the protocol.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.