Method and apparatus for estimating the frequency and/or phase of a digital signal
US6947508B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2001 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Oct 7, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0671
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for estimating a frequency and/or a phase of a digital input signal by determining phase values of the input signal. The phase values are then added over a predetermined summation length N/B. The sampling rate of the added-up phase values are reduced by a factor N/B in comparison with the sampling rate of the phase values. The added-up phase values are delayed in a chain of at least B−1 delay elements. The differently-delayed added-up phase values are then added or subtracted to create a resulting. pulse response of the frequency such that the resulting pulse response of the frequency is constant positive in a first interval, is zero in a second interval and is constant negative in a third interval, so that a resulting pulse response of the phase is constant in at least a middle interval or is otherwise zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.