Low noise mixer circuit with improved gain
US6947720B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 2001 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Feb 20, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A mixer circuit of the present invention includes a gain stage configured to receive a first signal and a modulated bias current, and in accordance therewith, produce an output signal, the gain stage generating a first current and receiving the modulated bias current from a bias circuit on a common node. The bias circuit includes an input configured to receive a second signal, and in accordance therewith, generate the modulated bias current. The mixer circuit also includes a current shunt circuit for generating a second current. The first current, the second current, and the modulated bias current are coupled to the common node. In one embodiment, the first signal is approximately a square wave, and the frequency of the first signal is one-third the frequency of the second signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.