Dynamic current calibrated driver circuit
US6947859B2 · kind B2 · utility
1Cited by
10References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2003 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Sep 10, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method to calibrate I/O cell current has been described. The method includes setting a global control value provided to the I/O cells. Then, for each I/O cell, the method includes comparing the logic voltage at the output pad of the I/O cell with a reference voltage, and sinking more current at the output pad by enabling additional driver bits associated with the I/O cell if the logic voltage is higher than the reference voltage, or sinking less current at the output pad by disabling additional driver bits associated with the I/O cell if the logic voltage is lower than the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.