Regionally time multiplexed emulation system
US6947882B1 · kind B1 · utility
9Cited by
15References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1999 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Sep 24, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A regionally time multiplexed emulation system includes an emulator for emulating a circuit design. The emulator includes a plurality of reconfigurable logic devices with buffered I/O pins and reconfigurable logic elements. The reconfigurable logic devices are reconfigurable to emulate a circuit design using at least one user clock to clock the logic elements and at least one signal routing clock to time multiplex the routing of emulation signals between the reconfigurable logic devices, with the at least one signal routing clock being independent of the at least one user clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.