System recovery from errors for processor and associated components
US6948092B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2002 |
| Grant date | Sep 20, 2005 |
| Priority date | — |
| Expiry date | Aug 1, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a primary processor and a secondary processor running in lockstep. The lockstep may or may not be synchronous. Errors occurring in the primary processor or the secondary processor are reported to an error-handling module. If the error is a recoverable error, the state of one of the processors is saved and the processors are restarted using the saved state. In addition to the reporting of errors from the processors, cross checking of the operation of the processors is performed to detect a divergence in the operation of the processors. If the divergence is reported to be due to a recoverable error, the state of the one of the processors is saved and the processors are restarted using the saved state. Procedures are also disclosed to ensure that data corruption does not propagate onto an associated network, and to ensure that the system is not lost as a network resource during processor restart.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.