Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio
US6950490B1 · kind B1 · utility
4Cited by
2References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 5, 2004 |
| Grant date | Sep 27, 2005 |
| Priority date | — |
| Expiry date | Mar 12, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K23/54
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A fault state detector for a ring counter is formed from unit current sources each switched under the control of a different one of the outputs of the ring counter. The currents switched in that manner are passed through a unit resistance to generate a voltage signal proportional to the number of asserted outputs from the ring counter. The voltage signal is compared to boundary reference values for valid states of the ring counter outputs and, if the voltage signal is not between the boundary reference values, a fault state is indicated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.