Clock enable system
US6950672B2 · kind B2 · utility
0Cited by
8References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 30, 2002 |
| Grant date | Sep 27, 2005 |
| Priority date | — |
| Expiry date | Aug 24, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/70
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock enable system for a multichip device includes a first integrated circuit including a clock signal and at least a second integrated circuit including at least one functional block periodically requiring clock signals from the first integrated circuit; a clock required circuit responsive to each functional block for providing a clock required signal in response to activation of any one or more of the functional blocks; and a clock enable circuit responsive to the clock required signal for enabling the first integrated circuit to provide clock signals to the functional blocks on the second integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.