Low-temperature polysilicon thin film transistor having buried LDD structure and process for producing same
US6951793B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 27, 2004 |
| Grant date | Oct 4, 2005 |
| Priority date | — |
| Expiry date | May 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6715
Abstract
A low-temperature polysilicon thin film transistor having a buried LDD structure is provided. Two heavily doped regions are formed in a semiconductor layer and distributed just below a surface of the semiconductor layer. Two LDD regions are both sandwiched between the two heavily doped regions in a direction substantially parallel to the surface of semiconductor layer, and separated from the surface of the semiconductor layer by a portion of the semiconductor layer. The process for producing such a thin film transistor is also provided. A first, a second and a third doping materials are injected into a semiconductor layer in different directions to form heavily doped regions and LDD regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.