Electronic and optoelectronic component packaging technique
US6952046B2 · kind B2 · utility
15Cited by
29References
48Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2003 |
| Grant date | Oct 4, 2005 |
| Priority date | — |
| Expiry date | Jun 13, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package including a substrate, a plurality of components on the substrate, and a lid assembly including a plurality of integrated covers for at least select components on the substrate. A method of manufacturing such a lid assembly is also disclosed as is a packaging method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.