Capacitor-built-in type printed wiring substrate, printed wiring substrate, and capacitor
US6952049B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2000 |
| Grant date | Oct 4, 2005 |
| Priority date | — |
| Expiry date | Mar 29, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/047
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A capacitor-built-in-type printed wiring substrate which can reliably eliminate noise and attain extremely low resistance and low inductance in connections between an IC chip and the capacitor, and a printed wiring substrate and capacitor for use in the same. A capacitor-built-in-type printed wiring substrate 100 on which an IC chip is mounted includes a capacitor-built-in-type printed wiring substrate 110 and an IC chip 101 mounted on the capacitor-built-in-type printed wiring substrate 110. A printed wiring substrate 120 includes a number of connection-to-IC substrate bumps 152 and a closed-bottomed capacitor accommodation cavity 121 formed therein. A capacitor 130 is disposed in the cavity 121 and includes a pair of electrode groups 133E and 133F and a number of connection-to-IC capacitor bumps 131 connected to either one of the paired electrode groups 133E and 133F. The connection-to-IC capacitor bumps 131 are flip-chip-bonded to corresponding connection-to-capacitor bumps 103 on the IC chip 101. The connection-to-IC substrate bumps 152 are flip-chip-bonded to corresponding connection-to-substrate bumps 104 on the IC chip 101.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.