Versatile system for controlling driver signal timing
US6952120B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2004 |
| Grant date | Oct 4, 2005 |
| Priority date | — |
| Expiry date | Feb 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/04123
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a system (200) for controlling drive signal timing parameters of an output driver circuit (206). The present invention defines a driver circuit having an output interface (204), and a first transistor (222) coupled to a first voltage supply (230), a first control signal (232), and a first node (220). The circuit also has a first resistive element, coupled between the first node and a second node (234). A second resistive element (228) is coupled to ground. A second transistor (224) is coupled to the second node, to a second control signal (236), and the second resistive element. The circuit has a third transistor (244), coupled to the first and second nodes, and to a third node (240). A third resistive element (242) is coupled between the third node and the output interface. A fourth transistor (238) is coupled to the first and third nodes, and to the output interface. The circuit also has a fifth transistor (216), coupled to a second voltage supply (218), to the first node, and to the output interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.