System and method for suppressing noise in a phase-locked loop circuit
US6952125B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2003 |
| Grant date | Oct 4, 2005 |
| Priority date | — |
| Expiry date | Oct 22, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/1978
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method for improving the signal-to-noise ratio of a frequency generator suppresses phase noise and noise generated from mismatches in the internal generator circuits. This is accomplished using a modulation scheme which shifts spurious noise signals outside the loop bandwidth of the generator. When shifted in this manner, the noise signals maybe removed entirely or to any desired degree using, for example, a filter located along the signal path of the generator. In one embodiment, a Sigma-Delta modulator controls the value of a pulse-swallow frequency divider situated along a feedback path of a phase-locked loop to achieve a desired level of noise suppression. In another embodiment, a reference signal input into a phase-locked loop is modulated to effect noise suppression. In another embodiment, the foregoing forms of modulation are combined to accomplish the desired frequency shift. Through these modulation techniques, the signal-to-noise ratio of the frequency generator may be substantially improved while simultaneously achieving faster lock times.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.