Void-free metal interconnection structure and method of forming the same
US6953745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2004 |
| Grant date | Oct 11, 2005 |
| Priority date | — |
| Expiry date | Jul 15, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76847
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metal interconnection structure includes a lower metal interconnection layer disposed in a first inter-layer dielectric layer. An inter-metal dielectric layer having a via contact hole that exposes a portion of surface of the lower metal layer pattern is disposed on the first inter-layer dielectric layer and the lower metal layer pattern. A second inter-layer dielectric layer having a trench that exposes the via contact hole is formed on the inter-metal dielectric layer. A barrier metal layer is formed on a vertical surface of the via contact and the exposed surface of the second lower metal interconnection layer pattern. A first upper metal interconnection layer pattern is disposed on the barrier metal layer, thereby filling the via contact hole and a portion of the trench. A void diffusion barrier layer is disposed on the first metal interconnection layer pattern and a second upper metal interconnection layer pattern is disposed on the void diffusion barrier layer to completely fill the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.