High impedance digital full line video clamp
US6956621B2 · kind B2 · utility
11Cited by
9References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2002 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Oct 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/185
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit for clamping a TV signal includes an input capacitor coupled to the TV signal, an analog-to-digital converter that outputs a digital signal corresponding to TV signal, a comparator that compares the digital signal to a black level signal, and a high impedance driver that charges the input capacitor in response to an output of the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.