Apparatus and method for low power routing of signals in a Low Voltage Differential Signaling system
US6956920B1 · kind B1 · utility
7Cited by
7References
14Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 21, 2000 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Mar 21, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0282
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A signal routing apparatus comprises a register bank to store a set of data signals. A delay locked loop generates a set of phase displaced clock signals. A phase controlled read circuit sequentially routes the set of data signals from the register bank in response to the phase displaced clock signals. A Low Voltage Differential Signaling buffer connected to the phase controlled read circuit transmits the data signals in a Low Voltage Differential Signaling mode. The phase displaced clock signals operate in lieu of a higher clock rate in order to reduce power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.