Incremental automata verification
US6957178B2 · kind B2 · utility
4Cited by
22References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2001 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Dec 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for performing formal verification of a system defined by a set of automata are useful in facilitating computing efficiencies during the verification of an incremental system design. The various embodiments permit computing efficiencies by saving information generated during a verification of the system for use in subsequent verification runs. The saved information includes calculation results pertaining to instances or elements of the system that do not require modification for the next subsequent verification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.