Reducing delay of command completion due to overlap condition
US6957300B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2002 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | May 9, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0674
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for transferring data between a host device and a data storage device having a first memory space and a second memory space. The host issues access commands to store and retrieve data. The device stores commands in the first memory space pending transfer to the second memory space. An interface circuit evaluates relative proximity of first and second sets of LBAs associated with pending first and second commands, and delays promotion of later pending commands in front of earlier pending commands during an overlap condition. If the overlap is caused by performance enhancing features (PEF) the PEFs are disabled so the commands can be scheduled for disc access. Indicators are set in the commands to signal that a PEF has caused the overlap and that PEF can be disabled. Values are added to indicators in the commands such that the PEFs can be modified and avoid overlaps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.