Method and apparatus for re-accessing a FIFO location
US6957309B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2002 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Nov 24, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2205/062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the invention is an apparatus. The apparatus includes a FIFO array having a first plurality of memory elements, each memory element having a predetermined number of bits, the FIFO array having a read pointer. The apparatus also includes a FIFO control register array having a second plurality of memory elements, each memory element of the second plurality corresponding to a memory element of the first plurality of memory elements, the read pointer suitable for accessing the FIFO control register array. The apparatus further includes a control logic block coupled to the FIFO control register array and the FIFO array. The control logic block is to receive a data value of the memory element of the FIFO control register array pointed to by the read pointer. The control logic block is also to signal the read pointer to stall responsive to the data value having a first value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.