Apparatus and method for facilitating memory data access with generic read/write patterns
US6957317B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2002 |
| Grant date | Oct 18, 2005 |
| Priority date | — |
| Expiry date | Aug 11, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/121
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of a cache hit/cache miss of data requested by the load instruction within a re-tiling (RT) cache. When a cache miss is detected, a block of data is loaded into the RT cache according to the load instruction. This block of data will contain the data requested by the load instruction. Once loaded, a non-horizontally sequential access of the data requested by the load instruction is performed from the RT cache. Finally, the data accessed from the RT cache may be stored into a destination data storage device according to the load instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.