Compensation sample and hold for voltage regulator amplifier
US6958596B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2003 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Oct 28, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M1/36
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The problem of charge leakage in the AC compensation filter for the error amplifier of a pulse width modulation (PWM)-based DC—DC converter is effectively obviated by controllably sampling and storing the voltage across the AC compensation filter, in response to a transition of the operation of a DC power supply from run or active mode to quiescent or sleep mode. The sampled voltage is retained as a compensation voltage throughout the quiescent mode, so that it will be immediately available to the PWM circuitry at the termination of the quiescent interval. This serves to ensure a relatively smooth (low noise) power supply switch-over during a subsequent transition from quiescent to active mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.