Circuit calibrating output driving strength of DRAM and method thereof
US6958942B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2004 |
| Grant date | Oct 25, 2005 |
| Priority date | — |
| Expiry date | Aug 9, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit for calibrating the output driving strength of a DRAM and method thereof is provided. A driving strength auto-compensation circuit is used to adjust the resistance value of an output generator inside a memory control chip and match with the target output driving strength of the DRAM. Hence, the input comparator of the memory control chip can be directly used to read from the DRAM and generate an output value so that extra high gain comparators are not required for accurately calibrating the output driving strength of the DRAM. Furthermore, the circuit is easy to implement and the calibrating process can be easily performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.